SUPREME
SUPREME aims at developing scalable baseline processes for superconducting quantum devices and provide European SMEs, start-ups, academia, RTOs and large enterprises with access to the processes. The project will implement an industrialisation roadmap for the superconducting quantum technologies for applications in quantum computing, sensing and communication (goal is to reach TRL6 and MRL6). SUPREME project will demonstrate a 3D integrated qubit module with 200 qubits will be demonstrated, improving stability, yield, and reproducibility of the key processes for superconducting quantum chips.
SUPREME aims at licensing its piloting services, preparing for technology transfers to volume manufacturing. Access to the technologies will be given through PDKs and pilot runs that will enable users to design the devices based on SUPREME processes.
SUPREME Service Office will enable a smooth customer experience.
The SUPREME project will achieve this through integrated objectives:
- Develop repeatable fabrication processes;
- Provide access to fabrication services via PDKs/pilot runs (Service Office);
- Build European development and innovation ecosystem for superconducting quantum chips.
Main points (4 scalable baseline processes)
- Angle-evaporated Josephson junction process for superconducting qubits.
- Etched junction processes (trilayer, overlap) for TWPAs, SFQ, SQUIDs and qubits.
- 3D integration processes for superconducting through-silicon vias and flip-chip bonding for multi-chip integration.
- Hybrid processes for superconducting nanowire single photon detectors (SNSPDs), and electro-optic transducers. Role of AMIRES
Role of AMIRES
AMIRES is responsible for dissemination, communication, clustering and skill development activities
Project partners list
SUPREME is co-funded by the Chips Joint Undertaking, under grant agreement No 101286304, and the National Funding Authorities of the Participating States: Austria, Czechia, Finland, France, Germany, Italy, the Netherlands, and Spain.